SMD-E specification wanted

[Eric Smith]

Does anyone have a copy of the SMD-E Interface Specification, which is
CDC/Imprimis/Seagate document 64712402? The spec for the earlier SMD
interface is on Bitsavers, but it doesn't look like the SMD-E spec is there.

Thanks!
Eric

[Stephen Fuld]

Post by Eric Smith
Does anyone have a copy of the SMD-E Interface Specification, which is
CDC/Imprimis/Seagate document 64712402? The spec for the earlier SMD
interface is on Bitsavers, but it doesn't look like the SMD-E spec is there.

Boy, it has been a while. We stopped using SMD interface disks by the
mid to late 1980s. I no longer have a copy of the spec, but I do
remember at least some of the differences. One was increasing the data
rate to 24 Mhz (3 MB/sec). I think they also redefined one signal to
allow more than 1024 cylinders. But my recollection is pretty hazy.

Just out of curiosity, why do you want this?

[Eric Smith]

Post by Eric Smith
Does anyone have a copy of the SMD-E Interface Specification, which is
CDC/Imprimis/Seagate document 64712402? The spec for the earlier SMD
interface is on Bitsavers, but it doesn't look like the SMD-E spec is there.
Boy, it has been a while. We stopped using SMD interface disks by the
mid to late 1980s. I no longer have a copy of the spec, but I do
remember at least some of the differences. One was increasing the
data rate to 24 Mhz (3 MB/sec). I think they also redefined one
signal to allow more than 1024 cylinders. But my recollection is
pretty hazy.

I knew they added tag 4-6 for more cylinders and other purposes, but I
want to find out whether the electrical specifications changed to
allow the 24 MHz data rate. I'm not convinced that the SN75110A
differential drivers and SN75108 differential receivers required by
the original SMD spec are fast enough for 24 Mbps use.

I wouldn't be too surprised if they switched to EIA-422 (formerly
RS-422) for the Write Data, Write Clock, Read Data, Read Clock, and
Servo Clock signals, or even for all the signals.

Post by Eric Smith
Just out of curiosity, why do you want this?

I've got about a hundred ST41097J SMD-E drives from PDP-11 systems, some
of which may contain PDP-11 software that I'd like to save. It isn't
practical to do anything with the original controllers (made by System
Industries), but it shouldn't be too hard to interface them to an FPGA
and extract the contents.

I've got the OEM manual for the ST41097J, but it doesn't give electrical
specs. It just references the SMD-E Interface Specfication.

Eric

[Stephen Fuld]

Eric Smith wrote:

snip

Post by Eric Smith

Post by Stephen Fuld
Just out of curiosity, why do you want this?

I've got about a hundred ST41097J SMD-E drives from PDP-11 systems, some
of which may contain PDP-11 software that I'd like to save. It isn't
practical to do anything with the original controllers (made by System
Industries), but it shouldn't be too hard to interface them to an FPGA
and extract the contents.
I've got the OEM manual for the ST41097J, but it doesn't give electrical
specs. It just references the SMD-E Interface Specfication.

Remember, SMD just gave you access to the raw bits on the drive. In
order to recover the data, you would need to understand the format of
the headers, the sizes of the data fields and gaps, and whatever ECC was
used. These would be a function of the SI controller, not the drive, so
you need to get information on them as well.

[Eric Smith]

Post by Stephen Fuld
Remember, SMD just gave you access to the raw bits on the drive. In
order to recover the data, you would need to understand the format of
the headers, the sizes of the data fields and gaps, and whatever ECC
was used. These would be a function of the SI controller, not the
drive, so you need to get information on them as well.

Not a problem. Data fields and gaps are pretty obvious. I can
reverse-engineer the sector format and ECC; I've done it before on
other kinds of drives.

The bigger problem will be if SI was doing any RAID or RAID-like
functionality across multiple drives, or if they did anything else that
prevents the logical data from being organized in an obvious way with
regard to the cylinder/head/sector geometry of the drive. (They probably
did some sector interleave, but that should be relatively obvious.)

I have some documentation on the SI controller, but it is not
particularly helpful.

Since posting my original request for the SMD-E spec, I've found
a little bit of information on the competing SMD interface extensions
from Fujitsu, HSMD and ESMD, which are NOT the same as SMD-E, though
they do (optionally) support tags 4, 5, and 6 of SMD-E. I can't quite
figure out the requirements for HSMD, but ESMD switched to using
ECL differential drivers and receivers for the data and clock pairs on
the B connector. Not too surprising, since 24 Mbps is beyond the rated
performance of EIA-422 parts at that time.

I also found that some of the Seagate drives had transfer rates as high
as 34.66 Mbps. I'm guessing that CDC/Imprimis/Seagate must have
switched to ECL drivers and receivers at some point, though perhaps that
was not part of the SMD-E spec.

Eric